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High-performance dual-core processor chip—H2048

H2048 is a high-performance dual-core processor embedded with a 32-bit C9500 of PowerPC architecture single-core , featuring with high speed interface of Gigabit Ethernet, PCIE 1.0, RapidIO, DDR, PCI, and normal speed interface of used SPI, UART and I2C. It integrates high-performance data path interface logics, networks, and peripheral buses required for network interconnection, telecommunications/data communication, and wireless infrastructure applications.

It can be used for comprehensive control, data path, and application layer processing in routers, switches, base station controllers, and general-purpose embedded computing. Compared to multiple discrete devices, its high integration offers significant  advantages while greatly simplifying the design of circuit boards.

The benchmark chip for H2048 is NXP MPC8548.

H2048 has achieved localized and domestic production in terms of design, manufacturing, packaging and testing.


Block Diagram

H2048 takes C9500 as the main core while taking an algorithm security engine as a coprocessor for implementing various cryptographic algorithms.In addition, it is equipped with necessary RAM resources and corresponding security protection mechanisms, supplemented by various peripheral interfaces such as USB, RapidIO, PCIE, etc. The composition is shown in the below figure :


Functional Characteristics

★ C9500 core:Compatible with NXP PowerPC e500MC core

★ Memory resources:Supporting 512KB SRAM

★ DDR/DDR2 controller: Supporting DDR1/DDR2 type memory

★ CoreNet consistency structure (CCF): Support Power architecture consistency operations; supporting debugging

★ eLBC bus controller: Containing 8 memory banks

★ SEC engine: Supporting automatic hardware scheduling of algorithms; supporting international standard cryptographic algorithms such as AES, RSA, ECC; supporting national cryptographic algorithms such as SM2, SM3, SM4

★ PCI/PCIX interface: Support standard PCI/PCIX interface

★ PCIE 1.0 interface

★ Serial RapidIO 1.2: Support RapidIO 1.2 standard

★ Gigabit Ethernet controller: Integrated 4 GMII interfaces

★ SPI interface: 1 channel

★ UART interface: 2 channels

★ I2C interface: 4 channels

★ GPIO: 32 channels

★ Debugging: Supporting JTAG debugging interface for software debugging

★ Packaging information: BGA783

★ Other features: Operating temperature -55℃~125℃; storage temperature -65℃~150℃

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